1. Technical Field
The disclosure relates to a voltage converting apparatus, and especially to a sub-harmonic detector of the voltage converting apparatus.
2. Related Art
Referring to FIG. 1, FIG. 1 illustrates a circuit diagram of a conventional voltage converting apparatus 100. The voltage converting apparatus 100 includes an oscillator 110, an OR gate 120, a SR latch SR1 and a pulse width modulation (PWM) signal generator constructed by comparators CMP1 and CMP2, and the voltage converting apparatus 100 further includes a power transistor PM, a transformer T1, a resistor RS and a rectifier 130. Therein, the oscillator 110, the OR gate 120, the SR latch SR1 and the PWM signal generator constructed by comparators CMP1 and CMP2 are used for generating a PWM signal PWM to control an on-or-off action of the power transistor PM.
The resistor RS is used for detecting a current flowing from a source terminal of the power transistor PM, and thereby generating a detected voltage VCS. In the conventional technical field, a comparison of the detected voltage voltage VCS and a reference voltage VCL is performed through the comparator CMP2, and a result of comparison generated by the comparator CMP2 is provided to the OR gate 120 as a basis for generating the PWM signal PWM by the SR latch. More specifically, the comparator CMP2 may be used for preventing from the condition that an excessive current flows from the source terminal of the power transistor PM.
Referring to both FIGS. 2A and 2B for the following, FIGS. 2A and 2B illustrate waveform diagrams of the conventional voltage converting apparatus 100 in different states. Therein, in FIG. 2A, the power transistor PM in the voltage converting apparatus 100 generates a driving current to make the detected voltage VCS equal to the reference voltage VCL, wherein the detected voltage VCS obtained at different timings TP1-TP3 are detected voltages VCS11, VSC12 and VCS13. Thus, it can be seen that voltage values of the detected voltage VCS of different periods are approximate, and thereby make the PWM signal generator of the voltage converting apparatus 100 generate the PWM signal PWM having a stable pulse width. In comparison, in FIG. 2B, the power transistor PM in the voltage converting apparatus 100 generates a driving current to make the detected voltage VCS equal to the reference voltage VCL, wherein the detected voltage VCS obtained at different timings TP1-TP3 are detected voltages VCS21, VSC22 and VCS23. Thus, it can be seen that the difference between the values of the detected voltage VCS of different periods is larger, and the pulse width of the PWM signal PWM generated by the PWM signal generator of the voltage converting apparatus 100 fluctuates, generating a so-called sub-harmonic condition (also known as a fluctuating condition).